ARM Cortex-A9 MPCore is a 32-bit multi-core processor providing up to 4 cache-coherent Cortex-A9 cores using the ARM v7 instruction set . [1] Presented in 2007. [2]
| ARM Cortex-A9 MPCore | |
|---|---|
| CPU | |
| Developer | ARM Holdings |
| Manufacturer | TSMC |
| CPU frequency | 0.8—3 GHz |
| Production technology | 65-28 nm |
| Instruction sets | ARMv7 |
| Number of cores | 1-4 |
| L1 cache | 32 KB I, 32 KB D |
| L2 cache | 128Kbyte – 8Mbyte (configured together with the L2 cache controller) |
Content
Overview
The main features of the cores Cortex-A9:
- Extraordinary , speculative , superscalar , with dynamic prediction of branching computing pipeline . The decoder processes 2 commands per clock, the buffer for redistributing instructions with a capacity of 32-40 commands, the depth of the integer pipeline is 8 steps. The core processes up to four micro-operations per clock.
- Renaming integer register file , 32 architectural registers are projected onto 56 physical ones. [3]
- Support (optional) NEON SIMD block instructions, processing up to 16 operands per instruction, vector width up to 128 bits. The execution unit is physically 64 bits wide, processing a 128-bit vector in two clocks. The execution of NEON commands is alternate.
- Support (optional) block of instructions for working with floating point numbers VFPv3. Separate computing pipeline, alternate execution.
- Thumb-2 instruction set support
- Support for TrustZone security extensions
- Jazelle DBX extension support for Java code execution
- Jazelle RCT extension support for JIT compilation
- TLB size - 128 entries
- 64-bit L1 cache bus
- L2 cache controller (0 - 4 MB, in later revisions up to 8 MB)
- Multi-core support
The size of some Cortex-A9 core blocks in conditional logic gates : the main core is approximately 600 thousand gates, the first-level cache with a controller is approximately 500 thousand gates, the NEON block is 500 thousand gates. In the production of TSMC technology and a 65 nm process technology, the area of a single Cortex-A9 core without caches and NEON is approximately 1.5 mm 2 [4] .
See also
- ARM Cortex-A5
- ARM Cortex-A7 MPCore
- ARM Cortex-A8
- ARM Cortex-A15 MPCore
- ARM Cortex-A17
Notes
- ↑ ARM Cortex-A9 MPCore (inaccessible link) . Arm.com. The date of circulation is February 2, 2012. Archived December 26, 2007.
- ↑ ARM Unveils Cortex-A9 Processors For Scalable Performance ... - ARM
- ↑ Arun. Handheld CPUs: Past, Present & Future (English) . Beyond3D (7 February 2011). The appeal date is December 26, 2014.
- ↑ Cortex-A9 Single Core Processor (not available link) . Arm.com. The date of circulation is February 2, 2012. Archived December 13, 2007.
Links
- ARM Holdings
- arm.com/products/processors/cortex-a/cortex-a9.php - the official website of ARM Cortex-A9 MPCore
- ARM Cortex-A9 Technical Reference Manuals
- Other sources