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Lattice (computer network topology)

Grid ( Eng. Grid network , sometimes also mesh, for example 3D-mesh) - a concept from the theory of organization of computer networks . This is a topology in which nodes form a regular multidimensional lattice. Moreover, each edge of the lattice is parallel to its axis and connects two adjacent nodes along this axis. Not to be confused with the concept of grid , which refers to a computing system.

A one-dimensional “lattice” is a chain connecting two external nodes (having only one neighbor) through a number of internal nodes (which have two neighbors left and right). When connecting both external nodes, the ring topology is obtained. Two- and three-dimensional lattices are used in the architecture of supercomputers (more often in the multidimensional torus version). Previously, networks with the hypercube topology also enjoyed certain popularity (multidimensional cube, each dimension of which is 2, total 2 ^ n nodes, where n is the number of dimensions of the hypercube)

FDDI- based networks use a dual ring topology, thereby achieving high reliability and performance.

A multidimensional lattice, connected cyclically in more than one dimension, is called the topology of the torus [1] (due to the similarity of the mathematical properties of the adjacency of nodes with the abstract surface " torus ").

Properties

Lattice networks using more than one dimension have a high redundancy of links and routes, but require a significant number of connections between nodes. Data forwarding is performed using transit nodes, which increases latency and requires an adequate choice of routing protocol. Modification of the network, in which it turns into a torus in one or several dimensions, has a smaller diameter, and hence lower average latency, however, it requires a certain number of longer connections, or folding some measurements.

It is also noted that the approach of tori and gratings, in which switching elements for a small number of ports (2 times the number of network measurements) are built into each node, does not allow full use of the progress in microelectronics, due to which it is possible to produce switching elements in a single a chip for dozens or even hundreds of high-speed ports (for example, at the end of the 2000s, switches on a chip for 18, 24, 32, 48 ports were used [2] )

Notes

  1. ↑ WJ Dally & B. Towles, “Principles and Practices of Interconnection Networks” - Morgan Kaufmann, 2004, ISBN 0122007514
  2. ↑ Scott Pakin. Chapter 1. High performance interconnects for massively parallel systems; 1.5 Future Directions // Attaining High Performance Communications: A Vertical Approach / Ada Gavrilovska. - Boca Raton (Florida) : CRC Press, 2009 .-- S. 20-21. - 416 p. - ISBN 9781420093131 .

Links

  • http://hsi.web.cern.ch/HSI/dshs/publications/rt97/html/node4.html "Figure 1 shows how a 400 node 2-dimensional grid network can be constructed."
Source - https://ru.wikipedia.org/w/index.php?title=Lattice_(computer_network_topology)&oldid=95291401


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Clever Geek | 2019