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Barrel shifter

The principle of operation of the quick shear device
The principle of constructing a quick shift scheme

Barrel shifter (fast shift device) - a digital electronic circuit that produces data shift by a specified number of positions in one clock cycle . The quick shift device can also perform a cyclic shift and expansion of the sign bit.

Two groups of input data, N bits each and N control signals, are fed to the device input; N data bits are obtained at the output. The number of bits to be shifted is determined by the position of the high-level control signal (all other control signals must be low), the operation performed is determined by the input data. For example:

  • when applying data to “input 1” and zeros to “input 0”, a right shift will be made;
  • when applying data to both inputs, a cyclic shift will be made.

The fast shift device is used in integer arithmetic operations (where a shift by one digit is equivalent to multiplication or division by two) and in operations on floating point numbers to align the operands when performing addition and subtraction. The mantissa of a number with a lower order is shifted to the right, the number of positions that are shifted is equal to the difference in the orders of numbers. After the shift, the orders of numbers become equal.

Disadvantages (for barrel shift, which implements a cyclic shift): [1]

  • Input capacitance is proportional to the capacity of N.
  • The number of transistors is proportional to the square of the bit depth N 2
  • A decoder is required for generating control signals.

In x86 processors are used, starting with Intel 80386. [2]

Resource Capacity

The number of multiplexers required to implement an n- bit shift device according to the barrel scheme isnlog2⁡n {\ displaystyle \ scriptstyle n \ log _ {2} n} {\displaystyle \scriptstyle n\log _{2}n} [3] . For five commonly used sizes, the number of multiplexers is:

  • 128-bit -128×log2⁡(128)=128×7=896 {\ displaystyle \ scriptstyle 128 \ times \ log _ {2} (128) = 128 \ times 7 = 896}  
  • 64-bit -64×log2⁡(64)=64×6=384 {\ displaystyle \ scriptstyle 64 \ times \ log _ {2} (64) = 64 \ times 6 = 384}  
  • 32-bit -32×log2⁡(32)=32×five=160 {\ displaystyle \ scriptstyle 32 \ times \ log _ {2} (32) = 32 \ times 5 = 160}  
  • 16-bit -sixteen×log2⁡(sixteen)=sixteen×four=64 {\ displaystyle \ scriptstyle 16 \ times \ log _ {2} (16) = 16 \ times 4 = 64}   [3]
  • 8-bit -eight×log2⁡(eight)=eight×3=24 {\ displaystyle \ scriptstyle 8 \ times \ log _ {2} (8) = 8 \ times 3 = 24}   [3]

The cost of the critical path in units of Fan-out-of-4 ( FO4 ) is estimated (excluding delay in conductors) as:

  • 32-bit: 18 FO4 to 14 FO4 [4]

See also

  • Logarithmic shifter

Notes

  1. ↑ An Interconnect-Centric Approach to Cyclic Shifter Design : slide 6
  2. ↑ [1] : "At the 386th processor ... they replaced the serial shift register with parallel (barrel shifter, produces any kind of shift by any number of bits in a fixed time)."
  3. ↑ 1 2 3 * VLSI Implementation of a Barrel Shifter Archived October 2, 2013. // Proceedings of SPIT-IEEE Colloquium and International Conference, Mumbai, India Vol2, 150
  4. ↑ David T. Wang, Revisiting the FO4 Metric. Estimating the FO4 depth of the critical path // RealWorldTech, August 15, 2002

Literature

  • Wayne Wolf. 6.2 Combinational Shifters // Modern VLSI Design: IP-Based Design. - 4th ed .. - Prentice Hall, 2009 .-- 627 p. - (Prentice Hall Modern Semiconductor Design Series). - ISBN 0137145004 .

Links

  • Design alternatives for barrel shifters , Matthew R. Pillmeier
  • VLSI Implementation of a Barrel Shifter // Proceedings of SPIT-IEEE Colloquium and International Conference, Mumbai, India Vol2, 150
  • Barrel Shifters // Bill Cowan, CS251 - Spring 2008
  • An Interconnect-Centric Approach to Cyclic Shifter Design
  • Shifters and Adders // Somayyeh Koohi
Source - https://ru.wikipedia.org/w/index.php?title=Barrel_shifter&oldid=92537892


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Clever Geek | 2019