Dynamic voltage change ( English Dynamic Voltage Scaling, DVS ) is a technology that allows you to reduce power consumption (as well as overheating) of a computer system depending on its load by reducing the CPU clock frequency and its power supply voltage.
The power spent on switching the CMOS chip depends on the clock frequency and the supply voltage:
- , [1]
where P - power consumption;
C is the gate capacitance of the transistors;
V - supply voltage;
f - clock frequency.
The maximum operating frequency of a CMOS chip depends on the supply voltage (almost linearly provided that the supply voltage significantly exceeds the formation voltage of the inversion layer at which the transistor opens), therefore, when the supply voltage decreases, a simultaneous decrease in the clock frequency is required, which reduces the system performance. By itself, a reduction in the clock frequency does not reduce power consumption, since it increases the task execution time, reducing the processor idle time.
- , [1]
where t is the delay time of the element;
k is a constant depending on the size and capacity of the gate;
V T - the formation voltage of the inversion layer.
- , [1]
where f is the maximum operating frequency;
L is the maximum number of elements connected in series.
The algorithm that implements a dynamic voltage change collects system load statistics by time intervals, predicts the load for the next time interval, and sets the required processor speed accordingly. DVS software includes: an operating system task scheduler that collects system load statistics; DVS control program processing statistics and calculating the required speed and CPUFreq driver setting the processor frequency. Computer hardware converts the required frequency into the voltage of the processor.
For real-time applications , the use of DVS technology can be a serious problem, since with a decrease in the clock frequency, the task will not be guaranteed by a certain time. [2]
Notes
- 2 1 2 3 Ala Quadi, Steve Goddard, Shane Farritor. A Dynamic Voltage Scaling Algorithm for Sporadic Tasks (English) (PDF). Proceedings of 24th IEEE Real-Time Systems Symposium. . University of Nebraska – Lincoln (December 2003). The date of circulation is December 12, 2012. Archived January 18, 2013.
- ↑ Padmanabhan Pillai, Kang G. Shin. Real-Time Voltage Scaling for Low-Power Embedded Operating Systems (PDF). University of Massachusetts. The date of circulation is December 12, 2012. Archived January 18, 2013.