Nano-ram

Nantero technology is based on the very well-known effect of carbon nanotubes, when crossed nanotubes on a flat surface can either touch each other or separate in the vertical direction (relative to the substrate) due to the attraction of Van der Waals . In Nantero technology, each NRAM “cell” consists of a number of nanotubes deposited on insulating “sections” on metal electrodes . The remaining nanotubes are located above the electrode “in the air”, at an altitude of about 13 nm , stretching between two sections. A small spot of gold is placed on top of the nanotubes of one of the sections, providing an electrical connection, that is, a terminal. The second electrode is below the surface at a distance of about 100 nm.

Typically, a small voltage is applied to the nanotubes overhanging the electrode between the terminal and the electrode located higher, as a result of which the current flow stops. This represents a state of "0". However, if a higher voltage is applied between the two electrodes, then the nanotubes will be attracted to the upper electrode until they touch it. At this point, a small voltage applied between the terminal and the upper electrode will allow current to flow freely (nanotubes are conductors), meaning state “1”. The state can be changed by changing the polarity of the charge applied to the two electrodes.

The use of this mechanism as memory allows the fact that in both positions the nanotubes are stable. In the off state, the mechanical deformation of the tubes is low, so they naturally maintain this position, thereby “remembering” “0”. When the tubes are attracted to the contact when a new charge is applied to the upper electrode, the tiny van der Waals forces come into play, and it turns out to be quite enough to force the tubes to undergo mechanical deformation. Having adopted this position, the tubes will continue to maintain it, thereby “remembering” “1”. These positions are quite resistant to external influences, such as radiation , which can erase or damage data in ordinary DRAM memory.

NRAM chips are created by placing the mass of nanotubes on a prepared chip containing rows of rectangular electrodes, above which insulating layers located between them rise slightly. Handsets that fall into the “wrong” places are then removed, and the gold terminals are placed on top. Any methods can be used to select a single cell for recording, for example, the second set of electrodes can work in the opposite direction, forming a grid, or they can be selected by applying voltage to the terminals, meaning that only these selected cells will receive a full voltage high enough to change data.

At the moment, the method of removing unnecessary nanotubes makes the system quite impractical. The accuracy of execution and the size of machine epitaxy are significantly “greater” than the size of cells created by other methods. Existing experimental cells have very low densities comparable to existing systems, and new production methods must be introduced to give the system practical value.

NRAM has a density, at least in theory, similar to DRAM. DRAM consists of a number of capacitors , which are, in fact, two small metal plates with a thin dielectric layer between them. NRAM is similar in this, having terminals and electrodes about the same size as the plates in DRAM, and the nanotubes between them are much smaller, so their size does not affect the overall cell size. However, there is a minimum size at which you can create DRAM chips, below which there simply will not be enough charge that the cell can save for reading. NRAM, apparently, is limited only by modern technological advances in lithography . This means that NRAM can achieve a higher density than DRAM, which means cheaper production if it becomes possible to control the application areas of carbon nanotubes in the same way that the semiconductor industry controls the placement of components on silicon .

Moreover, unlike DRAM, NRAM does not require energy to “update” data, and will hold data even after a power outage. The additional power required to record information is much lower than that of DRAM, which accumulates charge on the plates. This means that NRAM will compete with DRAM not only at the expense of cost, but also due to less power consumption to run, and in the end it will be significantly faster (the performance of write operations is mainly determined by the need to accumulate a full charge). NRAM can theoretically achieve performance similar to SRAM , which is faster than DRAM but has significantly lower density, which makes it much more expensive.

Compared to other NVRAM technologies (Non-Volatile Memory or Non-Volatile RAM), NRAM has potential that can provide a significant advantage. The most common type of NVRAM today is flash memory , which combines a bistable (that is, having two stable states) transistor circuit, better known as a trigger (which is the basis and SRAM), with a high-performance insulator wrapped around one of the bases of the transistor . After recording information, the insulator holds the electrons on the base (lower) electrode, thereby remembering the state "1". However, to change this state, the insulator must be “recharged” to remove any charge stored there. This requires a high voltage (approximately 10 volts), which significantly exceeds the battery capacity. Flash systems for this should contain a “charge pump" generator, which will gradually accumulate energy and give it out at high voltage. This process is not only very slow, but also damages the insulator. For this reason, flash memory has a very limited life cycle of approximately 10,000 to 1,000,000 rewriting cycles, after which the device will no longer work efficiently.

NRAM is potentially devoid of these problems. Read and write processes are low in terms of energy compared to flash memory (or DRAM, from this point of view), implying that NRAM will contribute to a longer battery life in conventional devices. It can also speed up write operations if NRAM replaces both flash memory and DRAM. A modern cell phone often uses flash memory to store phone numbers and other information, DRAM is used as random access memory to achieve the best performance (since flash memory is too slow for this), and small fragments of SRAM are used in the processor due to that DRAM is too slow to use here. NRAM is theoretically able to replace all these types of memory, a certain amount of NRAM memory placed on the CPU will be able to function as a processor cache , and other chips will be able to take on the functions of DRAM and flash memory.

NRAM - one of many new memory systems, most of which are positioned as "universal", like NRAM - promises to replace everything from flash memory to DRAM and SRAM.

The only alternative commercial-ready memory technology is FRAM (ferroelectric memory, FeRAM). In FeRAM chips, a certain amount of ferroelectric material is added to the so-called “ordinary” DRAM cell, the state of the field as applied to the material encodes a bit without destructive consequences for the cell. FeRAM has all the benefits of NRAM, although the smallest possible cell size is significantly larger than the NRAM cell size. FeRAM is currently used in several areas where a limited number of flash write cycles is a significant problem. FeRAM read operations are inherently destructive for data, requiring a read-write restore operation after reading.

Among other prospective candidates, promising MRAM and PRAM technologies are highlighted . MRAM is based on a grid of magnetic tunnel junctions . The key to the potential of MRAM is a memory reading method that uses a tunneling magnetoresistive effect , allowing you to read memory without a destructive effect and consuming quite a bit of energy. Unfortunately, the first generation of MRAM , which used a field that induces recording ^[1] , ran into a limit in terms of size that was superior to that of existing flash devices. However, two new MRAM technologies are currently under development and support promises to overcome size limits, making MRAM more competitive even when compared to flash memory. These technologies include Thermal Assisted Switching (TAS) ^[2] , developed by Crocus Technology , and Spin Torque Transfer (STT), which are being developed by Crocus , Hynix , IBM , as well as several other companies ^[3] .

PRAM memory is based on a technology similar to that used in rewritable CDs and DVDs, using a phase transition of states of a material that changes its magnetic and electrical properties instead of optical (changing optical properties is used in CDs and DVDs, but they are not applicable in chips ) The material for PRAM itself is scalable, but requires a significantly larger current source.

Due to significant investments in the production of flash memory (factories, etc.), at the moment there is no memory capable of replacing flash memory in the market.

On August 31, 2016, Fujitsu Semiconductor and Mie Fujitsu Semiconductor announced a purchase of a license for the development and commercial production of NRAM memory ^[4] . The first batch of products will be produced in 2018 according to the 55 nm process technology with a subsequent transition to 40 nm ^[5] .

• RAM
• Mram
• PRAM
• FRAM

• NRAM page on Nantero's website
• On the tube - A new type of computer memory uses carbon, rather than silicon (English) - article on the website of the journal "Economist"