Frequency synthesizer

Frequency synthesizer - a device for generating electric harmonic oscillations using linear repetitions (multiplication, summation, difference) based on one or more reference generators. Frequency synthesizers serve as sources of stable (in frequency) oscillations in radio receivers , radio transmitters , frequency meters , test signal generators and other devices that require tuning to different frequencies in a wide range and high stability of the selected frequency. Stability is usually achieved by using phase-locked loop or direct digital synthesis (DDS) using a reference oscillator with quartz stabilization. Frequency synthesis provides much higher accuracy and stability than traditional electronic generators with tuning by changing the inductance or capacitance, a very wide tuning range without any switching, and almost instantaneous switching to any given frequency.

Analog Synthesizers

The main function of absolutely any synthesizer is to convert the reference signal (reference) into the required number of output signals. Analog synthesizers (Direct Analog Synthesizers) are implemented by mixing individual base frequencies with their subsequent filtering. Base frequencies can be obtained on the basis of low-frequency (quartz and SAW resonators) or high-frequency (dielectric, sapphire, waveguide, ceramic resonators) generators by multiplication, division, or phase-locked loop.

The main advantage of analog synthesizers is the extremely high switching speed lying in the micro or even nanosecond range. Another advantage: the use of components (for example, mixers) with an extremely low level of intrinsic noise compared to sources of base frequencies. That is, the noise of an analog synthesizer is determined mainly by the noise of the underlying sources used and can be very low.

The main drawback of this topology is the limited range and frequency resolution. The number of generated signals can be increased by introducing a larger number of base frequencies and / or mixing stages. However, this approach requires a larger number of components and, therefore, complicates the system. An effective solution is to use a Direct Digital Synthesizer (DDS) to increase the minimum frequency step required by the analog part. Another serious problem is the many undesirable spectral components that generate the mixing stages. They must be carefully filtered. It is also necessary to provide isolation for switchable filters. There are many different schemes for organizing mixers and filters; all of them, as a rule, require a large number of components to ensure a small frequency step and a wide frequency range. Thus, although analog synthesizers offer exceptionally high tuning speed and low noise, their use is limited due to the relatively high cost characteristics.

Digital Synthesizers

Unlike traditional (analog) solutions, digital synthesizers use digital processing to obtain the desired shape of the output signal from the base (clock) signal. First, using a phase accumulator, a digital representation of the signal is created, and then the output signal itself is generated (sinusoidal or any other desired shape) by means of a digital-to-analog converter (DAC). The digital signal generation speed is limited by the digital interface, but it is very high and comparable to analog circuits . Digital synthesizers also provide a fairly low level of phase noise. However, the main advantage of a digital synthesizer is its exceptionally high frequency resolution (below 1 Hz), determined by the length of the phase battery. The main disadvantages are the limited frequency range and large signal distortion. While the lower limit of the working frequency range of the digital synthesizer is close to zero hertz, its upper limit, in accordance with the Kotelnikov theorem, cannot exceed half the clock frequency. In addition, reconstruction of the output signal is not possible without a low-pass filter, limiting the range of the output signal to approximately 40% of the clock frequency.

Another serious problem is the high content of undesirable spectral components due to conversion errors in the DAC. From this point of view, the digital synthesizer behaves like a frequency mixer, generating side components at combination frequencies. While the frequency location of these components can be easily calculated, their amplitude is much less predictable. Typically, lower order distortions have the highest amplitude. However, high-order distortions also have to be considered when designing a specific synthesizer architecture. The amplitude of spurious spectral components also increases with increasing clock frequency, which also limits the range of generated frequencies. Practical values of the upper limit of the range are in the region from several tens to several hundred megahertz with a level of discrete spectral products of -50 ... -60 dBc. Obviously, direct multiplication of the output signal of the frequency synthesizer is impossible due to further degradation of the spectral composition.

There are many hardware and software solutions designed to improve the spectral composition of a digital synthesizer. Hardware methods are usually based on transferring the digital synthesizer signal up in frequency and its subsequent division.

This method reduces the content of unwanted spectral products by 20 dB / octave. Unfortunately, this also reduces the range of frequencies generated. To expand the frequency range at the output of the synthesizer, you have to increase the number of base frequencies and filters - similar to how it is done in analog circuits.

Software methods are based on the fact that the frequency of side distortion of the synthesizer is a function of the sampling frequency of the DAC. Thus, for each specific output frequency of the synthesizer, side distortions can be shifted in frequency (and subsequently filtered out) by changing the sampling frequency of the DAC. This method is especially effective if clock pulses for the DACs are generated using PLL-based systems. It should be noted that the software method works quite effectively to suppress distortions of a relatively small order. Unfortunately, the density of discrete spectral products usually increases in proportion to their order. Therefore, the software method manages to filter the distortion only to the level of -70 ... -80 dBc.

Thus, due to the limited frequency range and high content of undesirable spectral products, digital synthesizers are rarely used to directly generate a microwave signal. At the same time, they are widely used in more complex analog and PLL systems to provide high frequency resolution.

PLL Synthesizers

A typical single-loop PLL synthesizer includes a tunable voltage-controlled oscillator (VCO) whose signal, after the required (programmable) frequency division, is delivered to the input of the phase detector (PD). The other input of the phase detector is connected to a reference signal source, the frequency of which equal to the required frequency step . The phase detector compares the signals at both inputs and generates an error signal, which, after filtering and amplification (if necessary), adjusts the VCO frequency to

f=f_{REF}*N

{\ displaystyle f = f_ {REF} * N}

where FREF is the frequency of the reference signal at the input of the phase detector.

The main advantages of PLL-based circuits are a cleaner output signal spectrum , due to the efficient use of a low-pass filter (LPF), and significantly lower device complexity compared to analog synthesizers. The main disadvantage is a longer tuning time and a significantly higher level of phase noise compared to analog circuits. The phase noise of the synthesizer within the passband of the PLL filter is

\lambda =\lambda PD+20logN

{\ displaystyle \ lambda = \ lambda PD + 20logN}

where λPD is the total phase noise level of the reference signal, phase detector, filter and feedback amplifier, recalculated to the input of the phase detector. Thus, the phase noise depends on the division ratio of the frequency divider, which, in order to provide the required frequency resolution, can be quite large. So, to obtain a signal at a frequency of 10 GHz with a resolution of 1 MHz, the division coefficient must be equal to 10,000, which corresponds to an increase in phase noise by 80 dB . In addition, programmable dividers are used at relatively low frequencies, which requires the introduction of an additional high-frequency divider with a fixed division ratio (prescaler - PS). As a result, the total division ratio of the feedback loop increases and, as a result, the phase noise increases. Obviously, such a simple circuit does not allow using the noise capabilities of modern low-noise reference signal generators. As a result, single-loop PLL circuits are rarely used, namely, in systems with low requirements for the quality of the generated signal.

The main characteristics of the synthesizer can be significantly improved by including a frequency converter (mixer) in the feedback circuit. In this case, the VCO signal is transferred downward in frequency, which significantly reduces the division ratio of the feedback circuit. The mixer reference signal is generated using an additional PLL loop (multi-loop) or a frequency multiplier. A good solution is to use a harmonic mixer, which uses the numerous harmonics of the reference signal generated by a diode integrated in the mixer. A harmonic mixer can greatly simplify the design of the synthesizer. It should be noted the extremely high sensitivity of this type of mixer to the parameters of individual circuit elements, the optimization of which is far from a trivial task. Depending on the specific requirements for phase noise and frequency resolution, a larger number of mixing stages can be introduced, which, however, complicates the design of the synthesizer. Another problem associated with the use of schemes based on frequency conversion is the false frequency capture (for example, when using the mirror channel of the mixer). Therefore, it is necessary to first sufficiently accurately adjust the frequency of the VCO, for example using a DAC. This, in turn, requires an extremely high linearity (and repeatability) of the dependence of the output frequency of the VCO on the control voltage in the operating temperature range, as well as the accurate calibration of the VCO to compensate for the temperature drift of this dependence. In addition, digital-to-analog converters usually have a higher noise level, which affects the noise characteristics of the synthesizer and requires the DAC to be removed from the PLL loop after being tuned to the desired frequency.

The total division factor can also be reduced by using fractional division coefficients - dividing the frequency by N + 1 every M signal periods and dividing by N for the rest of the time. In this case, the average division ratio is

(N+1)/M

{\ displaystyle (N + 1) / M}

where N and M are integers. For a given size of the frequency step of the circuit, the fractional division coefficient allows using a higher comparison frequency at the input of the phase detector, which leads to a decrease in phase noise and an increase in the tuning speed of the synthesizer. The main disadvantage of fractional division technique is the increased content of nonharmonic spectral components due to phase errors inherent in the fractional division mechanism.

The main elements of a digital frequency synthesizer.

Let us explain that the term "digital frequency synthesizer", as applied to pulse-phase-locked-loop frequency-locked loop (IFAP) systems (or [Impulse] Phase Locked Loop - PLL), we mean digital, using mainly digital circuitry, IFAP ring elements:

the path of forming the frequency of the reference signal;
frequency tuning path of the tunable generator (VCO) or Voltage Controlled Oscillator (VCO);
frequency-phase detector (PFD) or Phase Frequency Detector with Charge Pump.

The frequency channel of the reference signal is a divider with a fixed integer division coefficient (DPCD) or Reference Divider, and its division ratio $R$ ${\ displaystyle R}$ can be set by an external control word, for example, from 1 to 16384.

The frequency reduction path of the tunable generator is a divider with a variable division coefficient in $N$ ${\ displaystyle N}$ times (DPKD) or Divider with a float factor of division, integer-N Divider, its division ratio is also set by an external code and can be changed in a single step.

In low-frequency synthesizers (for example, in ADF4001), the VCO frequency division path is performed N times on ordinary DPCD counter frequency dividers, since the CMOS technology used allows implementing counter triggers with switching times of up to 4–6 ns.

Therefore, the frequency division path of the DFKD reference generator ensures reliable operation of the synthesizer to values $F_{REF}\leq 250$ ${\ displaystyle F_ {REF} \ leq 250}$ MHz (for example, in ADF4106). It should be noted that all synthesizers of the ADF4000 series provide a minimum division ratio of the reference frequency $R=1$ ${\ displaystyle R = 1}$ .

The introduction of a “prescaler”, or a two-module preliminary frequency divider, made it possible to raise the operating frequency of the DPKD to modern values (for example, up to 4 GHz with the ADF4113 synthesizer and up to 6 GHz with the ADF4106 synthesizer). Minimum Prescaler Module $P_{MIN}=8$ ${\ displaystyle P_ {MIN} = 8}$ allows you to provide NMIN = 56.

The output frequency of the synthesizer can be determined by the formula:

{\frac {[(P*B)+A]*F_{REF}}{R}}

{\ displaystyle {\ frac {[(P * B) + A] * F_ {REF}} {R}}}

Where:
$f_{VCO}$ ${\ displaystyle f_ {VCO}}$ - output frequency of the synthesizer;
$P$ ${\ displaystyle P}$ - prescaler module;
$B$ ${\ displaystyle B}$ - division ratio of counter B;
$A$ ${\ displaystyle A}$ - counter division coefficient A (0 ≤ A <B);
$F_{REF}$ ${\ displaystyle F_ {REF}}$ - frequency of the reference oscillation;
$R$ ${\ displaystyle R}$ - division ratio of the reference divider.

Any prescaler consists of an absorbing Swallowing Counter and a pulse absorption circuit. $P/P+1$ ${\ displaystyle P / P + 1}$ . The total switching delay of these nodes should not be a multiple of the input oscillation period, that is, the active differences of the input and control pulses should not coincide. Otherwise, the effect of "competition" occurs and the device starts to malfunction. In practice, they try to ensure that the total delay in the prescaler does not exceed the minimum period of the input oscillation. In other words, the delay in the prescaler determines the maximum operating frequency of the chip.

An interesting feature of the operation of the prescaler in the ADF4110 (1/2/3) synthesizers is the so-called resynchronization mode, or restoration of synchronization of the input radio frequency at the output of the prescaler - resynchronizing the prescaler output.

In the prescaler synchronization mode, the moments of its switching from the “division by $P$ ${\ displaystyle P}$ "To the" division by $P+1$ ${\ displaystyle P + 1}$ »Gated by the frequency of the RF input signal. Gating reduces phase noise $N$ ${\ displaystyle N}$ -divider (jitter), but makes more stringent requirements for the size and stability of the internal delays of the chip. Therefore, the maximum input frequency at the RF input, at which the synthesizer works reliably, may decrease.

Links

Starikov O. PLL method and principles of synthesizing high-frequency signals.
Makarenko V. Direct Digital Synthesis Frequency Synthesizers. (inaccessible link)
Ryzhkov A.V., Popov V.N. Frequency synthesizers in radio technology. - M .: Radio and Communication, 1991 - 264 s - ISBN 5-256-00623-1
Manassevich V. Frequency synthesizers. Theory. Design.
Shakhtarin B.I. Frequency synthesizers.