Kilocore (from English - “K-core”) is a family of experimental high-performance processors with multiple cores and low power consumption, developed by Rapport and IBM in 2006-2008. The second version of the processor contains 1025 cores, one of which is the usual core of the PowerPC architecture, and the remaining 1024 are 8-bit Processing Elements ( Processing Elements ) operating at 125 MHz each. They can be dynamically reconfigured, they are connected via a common bus. It was assumed that the chip will provide opportunities for high-performance parallel computing .
The first Rapport product launched on the market was the KC256 with 256 8-bit processor elements. Deliveries KC256 was planned to begin in 2006. [1] Computational elements were formed into a matrix of 16 by 16: 16 stripes ( English stripes ) with 16 processor elements each. Each strip can be allocated for a separate task.
The KC1024 and KC1025 thousand core processors were released in 2008. Both have 1024 8-bit processor elements with a configuration of 32 processors in 32 bands. The KPC1025 has a built-in PowerPC architecture core, while KC1024 has only processor elements.
IBM claims that the massive use of the KC1025 will make it possible to speed up the processing of high-definition streaming video on low-powered mobile devices by 5-10 times compared to existing processors. [2]