VLIW ( Eng. Very long instruction word - “a very long machine instruction”) is an architecture of processors with several computing devices . It is characterized by the fact that one processor instruction contains several operations that must be performed in parallel [1] [2] . In fact, this is “visible to the programmer” microprogram control, when the machine code is just a bit of minimized microcode for direct control of the equipment.
There are also several computational modules in superscalar processors , but the task of distributing work between them is solved in hardware. This greatly complicates the processor device, and can be fraught with errors. In VLIW processors, the distribution problem is solved at compile time and the instructions clearly indicate which computing device which command should execute.
VLIW can be considered a logical continuation of the RISC ideology, expanding it to architectures with several computing modules. Just like in RISC, the instructions clearly indicate what exactly each processor module should do. Because of this, the instruction length can reach 128 or even 256 bits.
Content
Example
Consider the operation of a model VLIW processor with two arithmetic-logical devices (ALU) . Suppose we need to add the four numbers in the registers R1, R2, R3 and R4. Then the pseudo code might look like this:
R5 = R1 + R2, R6 = R3 + R4; each ALU adds its own pair of numbers R0 = R5 + R6, NOP; the first ALU finds the amount, the second is idle
Advantages and disadvantages
The VLIW approach greatly simplifies the processor architecture by shifting the task of distributing computing devices to the compiler . Since there are no large and complex nodes, power consumption is greatly reduced.
At the same time, the code for VLIW has a low density. Due to the large number of empty instructions for idle devices, programs for VLIW processors can be much longer than similar programs for traditional architectures.
The VLIW architecture looks rather exotic and unusual for a programmer. Due to the complex internal code dependencies, manual programming at the machine code level for VLIW architectures is quite complicated. You have to rely on compiler optimization.
Implementations
The first VLIW processors were developed in the late 1980s by Cydrome (1984–1988), MultiFlow (1984-1990) [3] , Culler . [four]
The pure VLIW architecture has Philips TriMedia processors and the Texas Instruments DSP C6000 family.
The Transmeta Crusoe microprocessor contains an x86 binary compatibility layer that compiles instructions into an internal processor format ( code morphing ). The Crusoe core is a VLIW processor. [five]
The Intel Itanium microprocessor has a 64-bit EPIC processor instruction system with explicit parallelism, which is one of the VLIW options.
The Elbrus-3 multiprocessor computing complex and the Elbrus series microprocessors ( Elbrus 2000 , Elbrus S ) are VLIW processors. [6]
Processors manufactured by Tilera also have a VLIW architecture. [7]
VLIW also gained a good distribution in the GPU market, for example, AMD / ATI Radeon video processors from the R600 to the Northern Islands inclusive have a VLIW architecture. [8] [9] Starting with the Southern Islands (Q1 2012), AMD / ATI has moved away from the VLIW approach. [10]
Qualcomm’s modern Qualcomm Snapdragon chip systems, designed to be used as the central processor of phones and tablets, contain Hexagon VLIW architecture (QDSP6) coprocessors. It can run sound and multimedia processing algorithms, as well as part of the digital processing of wireless signals. 4 sets of 4 instructions can be launched on a monthly basis; hardware multithreading is supported (temporary multiplexing, in particular, in some versions of the architecture - revolving type ).
See also
- RISC
- Transmeta
Notes
- ↑ Modern high-performance computers (inaccessible link) V. Schnitman, information and analytical materials of the Center for Information Technologies, 1996. Chapter 7, section “Machine Architecture with a Long Command Word”
- ↑ An Introduction To Very-Long Instruction Word (VLIW) Computer Architecture Archived November 29, 2014. // Philips Semiconductor
- ↑ AMiner - Open Science Platform>
- ↑ VLIW: new generation old architecture // IXBT
- ↑ Transmeta Crusoe. First look
- ↑ http://ixbtlabs.com/articles2/vliw/ "Elbrus-3, ... it was a decent stage in the development of the VLIW."
- ↑ http://arstechnica.com/business/news/2010/06/tilera-launches-512-core-server-for-the-cloud.ars "Tilera's cores implement a very simple VLIW design"
- ↑ Lev Dymchenko. GPU computing. Features of the architecture AMD / ATI Radeon . ixbt.com. Archived February 8, 2012.
- ↑ Dmitry Vladimirovich. Overview of the AMD Radeon HD 6870 graphics card . overclockers.ru. Archived February 8, 2012.
- ↑ AMD revealed details of the architecture of Next Generation Core - the foundations of Radeon HD 7900 graphics cards . http://www.ixbt.com/.+ Archived on February 8, 2012.